1. Field of the Invention
The present invention generally relates to multilayer inductors and more particularly to a multilayer inductor adapted to accommodate a flip chip on a top surface thereof and having conductive patterns formed on its top, bottom and side surfaces.
2. Description of Related Art
Multilayer inductors are well known in the art. For example a chip-type inductor comprising a laminated structure is disclosed in U.S. Pat. No. 4,543,553. The structure includes a plurality of magnetic layers in which linear conductive patterns extending between the respective magnetic layers are connected successively in a form similar to a coil so as to produce an inductance component. The conductive patterns formed on the upper surfaces of the magnetic layers and the conductive patterns formed on the lower surfaces of the magnetic layers are connected with each other in the interfaces of the magnetic layers and are also connected to each other via through-holes formed in the magnetic layers so that the conductive patterns are continuously connected in a form similar to a coil.
U.S. Pat. No. 5,032,815 discloses a lamination type inductor having a plurality of ferrite sheets assembled one above the other and laminated together, the uppermost and lowermost sheets being end sheets having lead-out conductor patterns thereon and conductor patterns on the surfaces of the end sheets which face each other which are connected to the lead-out conductor patterns and which are for connection to conductor patterns on intermediate sheets, and a plurality of intermediate ferrite sheets, each having a conductor pattern on one surface thereof which corresponds to a 0.25 turn of an inductor coil and a conductor pattern on the other surface which corresponds to a 0.5 turn of an inductor coil, each ferrite sheet having an opening therethrough through which the conductor patterns of the 0.25 and 0.5 turn are electrically connected to form a 0.75 turn of an inductor coil on each ferrite sheet. The conductor patterns on the successive intermediate sheets are connected to each other for forming an inductor coil having a number of turns which is a multiple of 0.75, and the conductor patterns on the upper surface of the uppermost of the plurality of intermediate ferrite sheets and the lower surface of the lowermost of the intermediate ferrite sheets are electrically connected to the conductor patterns on the surfaces of the end sheets which face each other for forming with the last-mentioned conductor pattern a complete inductor coil.
U.S. Pat. No. 6,630,881 discloses a method for producing a multi-layered chip inductor that includes the steps of: forming coil-shaped internal conductors inside a green ceramic laminate, each of which coil-shaped internal conductors is spiraled around an axial line in the laminating direction of the green ceramic laminate; applying an external electrode paste onto at least one laminating-direction surface of the green ceramic laminate, which external electrode paste connects to an end of the coil-shaped internal conductor; cutting the green ceramic laminate along the laminating direction into chip-shaped-green ceramic laminates each having the coil-shaped internal conductor inside; and firing each of the chip-shaped green ceramic laminates and baking the external electrode paste to form an external electrode.
Another laminated inductor is disclosed in U.S. Pat. No. 7,046,114. The laminated inductor includes ceramic sheets provided with spiral coil conductor patterns of one turn, ceramic sheets provided with spiral coil conductor patterns of two turns, and ceramic sheets provided with lead-out conductor patterns, which are laminated together. The coil conductor patterns are successively electrically connected in series in regular order through via holes. The via holes are disposed at fixed locations in the ceramic sheets.
U.S. Pat. No. 6,930,584 discloses a microminiature power converter including a semiconductor substrate on which is formed a semiconductor integrated circuit, a thin film magnetic induction element, and a capacitor. The thin film magnetic induction element includes a magnetic insulating substrate, and a solenoid coil conductor in which a first conductor is formed on a first principal plane of the magnetic insulating substrate, a second conductor is formed on a second principal plane of the magnetic insulating substrate, and a connection conductor is formed in a through hole passing through the entire magnetic insulating substrate. The disclosed power converter suffers the disadvantage that plating the deep through hole is difficult and expensive.
U.S. Published Patent Application No. 2006/0227518 discloses a thin film magnetic induction element including a ferrite substrate, a coil provided across the ferrite substrate and including connection conductors and coil conductors, and terminals provided on perimeter portions of the substrate. Terminals capable of being adversely affected by an induced magnetic flux, such as a VDD terminal, a CGND terminal, an IN terminal, a PVDD terminal, a PGND terminal, an FB terminal, a CE terminal, and an AL terminal are arranged along the Y-direction of the substrate, in which the magnetic flux density is low. Terminals substantially incapable of being adversely affected by an induced magnetic flux are arranged along the X-direction of the substrate, in which the magnetic flux density is high. A micro electric power converter having the thin film magnetic induction element is less susceptible to circuit malfunction.
Although it is possible to surface mount a flip chip on top of the inductors disclosed by the above U.S. Pat. No. 6,930,584 and U.S. Published Patent Application No. 2006/0227518, the deposition of conductive layers, for example Cu/Ni layers on top, bottom and side walls of the inductor requires special thick metal deposition technology which is difficult and costly and makes the final product less competitive. Furthermore, the disclosed inductors are single layer inductors, not multilayer inductors.
In view of the foregoing, there is a need for a cost-effective multilayer inductor adapted to accommodate a flip chip on a top surface thereof and having conductive patterns formed on its top, bottom and side surfaces. Further objects and advantages of the present invention will be apparent from the following detailed description of the invention and associated drawings.